A semiconductor device uses various reference voltages to discriminate the logic levels of internal signals. Since these reference voltages serve as absolute voltages for discriminating the logic levels of the data and the internal signals, it is important to check level ranges for allowing the data and the internal signals to be received without errors.
Recently, reference voltage training is being used where it is capable of setting the levels of a reference voltage by finding the level range of the reference voltage for allowing a normal operation. The reference voltage training is implemented such that the levels of a reference voltage are set according to the combinations of code signals preset in a mode register set (MRS) and write and read operations are performed according to the reference voltage set by the reference voltage training. The term “combination” refers to a numeric value associated with signals or data. For example, if the code signals comprise two signals, each signal may be at a logic low level (‘0’) or a logic high level (‘1’), and there are four combinations of the two signals corresponding to numeric values of zero (‘00’), one (‘01’), two (‘10’), and three (‘11’). Accordingly, when code signals in the reference voltage training have n bits, the reference voltage is set to 2n number of different levels, and the write and read operations are performed 2n times.
Therefore, in the conventional reference voltage training, the write and read operations should be performed by the number of combinations of the code signals. Consequently, as the number of bits increases, time and amount of current required for the reference voltage training increase in a geometrical progression.